At relatively low speeds of data transportation, roughly 100 Mb/sec, error rates between two different ICs on a circuit pack or over a backplane are generally unmeasurable. In other words, they are close to zero. As speeds of data transportation over backplanes and between ICs increase to 2.5 Gb/s and above, the likelihood of having transmission errors increases as well. These errors may be due to effects such as inter-symbol interference, attenuation, couplings between links on the ICs, noise coupling from digital to analog section of an IC, simultaneous switching noise in ICs, signal distortion in connectors or backplane, and process distortion, among others. Consequently, it becomes difficult to get sufficiently low errors rates.
Consequently, there is a need in the industry for reducing bit error rates at high transmission speeds over backplanes and between ICs.